Fiberplex FOM-1090 Uživatelský manuál Strana 14

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DIPSwitchSettings
CompatibilitywithMILSTDcircuits
ThedriversandreceiversforV.11signalsarecompatiblewiththeMILSTDbalancedspecificationsandthe
V.10interfaceissimilartoMILSTDunbalanced.MILSTD100signalsusethesamenegativeMARKcondition
asTIAcircuits,sothereisnoneedtoinverttheTDandRDsignals.MIL
STD188114Aissetupforusercontrol
oftheMARKlevel,sotheneedfordatainversionattheFOMwillneedtobemadeonacasebycasebasis.
IftheMILSTDinterfaceusesanyunbalancedsignals,suchasMILSTD188C(notethatthis
standardusesa
positiveMARK),thenprovisionswillneedtobemadetoexternallybiasonesideofthereceiversontheFOM
tousethemsingleended.NotethattheMILstandardsareonlyanelectricalspecificationanddonotspecifya
pinoutorconnectortype,soacustom
cablewillberequiredinmanycases.
Asynchronous,Isochronous,orSynchronousoperation
TheFOMistransparenttodataandclockingformats,sotherearenoswitchsettingsfordistinguishingthe
differentmodesofoperation.WhenapairofFOM1090unitsisusedasmodemlinkbetweentwoDTEs,allof
theinputsignalsaretransferredtothecrossedovercorrespondingoutputs(i.e.
‐TTfromtheDTEisprovided
asRToutoftheFOM1090)attheoppositeend.WhentheFOMisusedinSendTimingapplications,certain
switchoptionsmaybeusedtoeliminateclockingissuesthatmayarise.Thoseoptionsareexplainedbelow.
SendDataRegenerationwhenusingSendTimingfromtheDCE
ThetypicalSendTimingsetuphastheDCEsupplyingallclocks.TheSTsignalisgeneratedattheDCEandthen
carriedtotheremoteDTE.Inreturn,theremoteDTEthenclockstheSendDataoutofitselfontherisingedge
ofthesuppliedSTsignal.TheSend
DataiscarriedbacktotheDCEwhereitisclockedin,samplingthedatabit
onthefallingedgeofthegeneratedSTclock.Alignmentproblemsariseduetopropagationdelaywhencertain
combinationsofdatarateandcabledistance(bothcopperandfiber)resultintheSendData
transitions
occurringnearthefallingedgeoftheSTsignalattheDCE.
Asanexample,usingaroughnumberof4nsdelaypermeterofcable,25metersofcablewitha2.5mHzclock
willcausea180degreeshiftintheSTSDrelationshipattheDCE
interface.(Thereisactually50metersof
propagationdelaysincetheclocktravels25metersinonedirectionandthedatatravels25metersinthe
other).ThisiswithouttakingintoaccountthedelaysofthelinedriversandreceiversintheDTE.
TheFOM1091regenerationoptionsmake
upforthisintwoways.ThefirstistocorrectforanySDST
misalignmentduetopropagationdelayfromtheFOM1091totheDCEbydelayingtheSDsignaloutofthe
FOMbyonehalfofaSTclockcycle.ThesecondistheFOMhasthe
abilitytoretimetheincomingSDdata
internallywiththeincomingSTsignal,whichremovesanysamplingjitterfromtheSDsignalaswellas
correctingforpropagationdelays.
WhilethefallingedgeoftheSTsignalfromtheDCEisideallylocatedmidbitoftheSDsignalcoming
intothe
DCE,itisnotnecessaryforittobemidbit.Infact,it’susuallynotmidbitduetodelays.Thisisoften
misunderstood.TheactualrequirementisthatthesetuptimefortheregisterthattheSDsignalisbeing
loadedintobemetandthis
isusuallyafractionoftheavailablebittime.Theonlytimethereisaproblemis
whenthefallingedgeoftheSTistooclosetotheSDtransitionsattheDCEinterfaceandthispreventstheset
uptimefrombeingmet.IftheSTfallingedge
isfarenoughawayfromtheSDtransitionedges(whenthenew
SDdatabithasmetthesetuptime),theDCEwillstillclockthedatareliablyeventhoughitisn’tmidbit.Thisis
whymanySTtimingsetupswillworkwithnoregenerationrequiredatall.
Whentheedgesaretoocloseat
theDCEtheFOMwillneedtoretimethedataontheoppositeedgeoftheSTsignalbysett ing switch 1.8to
ON.Thiswillallowthatwhenthepropagationdelaysaretakenintoaccounttheedgeshaveskewedenoughto
meet
thesetuptimeattheDCE.
Notethatininstallationswherethe dataratemaybech angedorthecablelengthsmaychangeduetopatch
panelroutingofequipment,it’sentirelypossiblethatacombinationofswitchsettingsthatworksinone
scenariowillnotworkinanother.The
onlysolutiontothesesituationsistoinsertmoredelayinoneormore
oftheconfigurationsbyaddingtocablelengthuntilallofthescenarioswillworkwiththesameswitch
settings.
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